ARM寄存器描述

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1、ARM寄存器描述1产品预览介绍三星的S3C44B0X16/32位RISC处理器被设计来为手持设备等提供一个低成本高性能的方案。S3C44B0X提供以下配置：2.5VARM7TDMI内核带有8Kcache;可选的internalSRAM;LCDController(最大支持256色STN，使用LCD专用DMA)；2-chUARTwithhandshake(IrDA1.0,16-byteFIFO)/1-chSIO；2-chgeneralDMAs/2-chperipheralDMAswithexternalrequestpins；Externalmemory

2、controller(chipselectlogic,FP/EDO/SDRAMcontroller)；5-chPWMtimers&1-chinternaltimer；WatchDogTimer；71generalpurposeI/Oports/8-chexternalinterruptsource；RTCwithcalendarfunction；8-ch10-bitADC；1-chmulti-masterIIC-BUScontroller；1-chIIS-BUScontroller；Sync.SIOinterfaceandOn-chipclockgen

3、eratorwithPLL.。S3C44B0X采用一种新的三星ARMCPU嵌入总线结构-SAMBA2，最大达66MHZ。电源管理支持：Normal,Slow,Idle,andStopmode。系统管理功能：1Little/Bigendiansupport.2Addressspace:32Mbytespereachbank.(Total256Mbyte)3Supportsprogrammable8/16/32-bitdatabuswidthforeachbank.4Fixedbankstartaddressandprogrammablebanksizef

4、or7banks.5.8memorybanks.-6memorybanksforROM,SRAMetc.-2memorybanksforROM/SRAM/DRAM(FastPage,EDO,andSynchronousDRAM)6.FullyProgrammableaccesscyclesforallmemorybanks.7Supportsexternalwaitsignaltoexpendthebuscycle.8.Supportsself-refreshmodeinDRAM/SDRAMforpower-down.9.Supportsasymmet

5、ric/symmetricaddressofDRAM.Cache和内部存储器功能:•4-waysetassociativeID(Unified)-cachewith8Kbyte.•The0/4/8KbytesinternalSRAMusingunusedcachememory.•PseudoLRU(LeastRecentlyUsed)ReplaceAlgorithm.•Writethroughpolicytomaintainthecoherencebetweenmainmemoryandcachecontent.•Writebufferwithfour

6、depth.•Requestdatafirstfilltechniquewhencachemissoccurs.时钟和电源管理•Lowpower•Theon-chipPLLmakestheclockforoperatingMCUatmaximum66MHz.•Clockcanbefedselectivelytoeachfunctionblockbysoftware.•Powermode:Normal,Slow,IdleandStopmode.Normalmode:Normaloperatingmode.Slowmode:Lowfrequencycloc

7、kwithoutPLLIdlemode:StoptheclockforonlyCPUStopmode:Allclocksarestopped•WakeupbyEINT[7:0]orRTCalarminterruptfromidlemode.中断控制器•30Interruptsources(Watch-dogtimer,6Timer,6UART,8Externalinterrupts,4DMA,2RTC,1ADC,1IIC,1SIO)•VectoredIRQinterruptmodetoreduceinterruptlatency.•Level/edge

8、modeontheexternalinterruptsources•Programmablep