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1、上海交通大学硕士学位论文基于SimpleScalar的拥有存储与总线扩展能力的异构多核仿真器姓名：林明亮申请学位级别：硕士专业：电路与系统指导教师：郭炜;祝永新20070109AHETEROGENEOUSMULTIPROCESSORSIMULATORBASEDONSIMPLESCALARWITHEXTENSIONSFORMEMORYANDBUSABSTRACTWiththedevelopmentofsystem-on-chip(SoC)andembeddedsystems,heterogeneousmulti-coreprocessorsbegintocomeintopeople’slif
2、e.Inordertoshortenthedevelopmentcycleandsavecosts,asystem-levelmulti-coresimulatorisinneed.However,duetothelackofsystem-levelsimulationplatformsformulti-coreheterogeneousprocessors,theresearchonmulti-coreheterogeneousprocessorsimulatorsjuststartstoevolvedistinctly.Thispaperproposesasimulationmetho
3、dologywithimplementationofaheterogeneousmulti-coresimulator.Theheterogeneousmulti-coresimulatorisbasedonSimpleScalarintegratedwithaSystemCframework,whichdealswithcommunication,andsynchronizationamongdifferentprocessingmodules.Inter-corecommunicationisenabledwithasharedmemoryschemeincorporatingaset
4、ofsharedmemoryaccessinstructionsandcommunicationmechanisms.Inaddition,asynchronizationmechanism,whichswitchesexecutionofprocessorcomponentsonlywhencommunicationoccurs,isproposedforefficientcooperationamongmultiplecoresonsingleapplication.Furthermore,throughthebusinterfaceextendedfromsharedmemory,o
5、thermodulescanbeeasilyintegratedintothesimulatorframework,toachieveamorecomplicatedco-simulation.Experimentalresultsshowthatoursimulatorcorrectlysimulatesthebehaviorofamulti-coreprocessoraswellasinter-corecommunications.ThesimulatoralsodemonstratesaconvincingperformanceonLinuxPCplatforms.Webelieve
6、thatthesimulatorpresentedinthethesisshouldserveasagoodplatformtostudymulti-coreprocessorarchitecture.Researchtopicsbasedontheplatformwillincludemicro-architectureofsinglecore,overallarchitectureofamulti-coreprocessoraswellasthebusandmemorychannels.KEYWORDS:HeterogeneousMulti-processor,SimpleScalar
7、,SystemC,Inter-corecommunication,Synchronization,BUS图片目录[8]图1IBMPOWER4和POWER5双核处理器架构··············································5[10]图2OMAP异构多核处理器的体系结构···························································
