基于FPGA的GPIB控制器的IP核设计

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1、西南交通大学硕士学位论文基于FPGA的GPIB控制器的IP核设计姓名：陈立超申请学位级别：硕士专业：微电子学与固体电子学指导教师：杨小雪20080501西南交通大学硕士研究生学位论文第lI页AbstractSOChasbecomethemainsystemimplementationtechnology．NRErisks，time-to-marketpressure，andever-increasingdesigncomplexity,allthesefactorsdrovetheSOCindustrydividedintothreeparts：IPprovider,designservi

2、ceprovider,andchipintergratoLTheSOCentersaneweara：platform·basedSOCdesignwithvariousIPintegrations．ThestrictlyverifiedandreliableIPcoresareplayingallessentialandsignificantroleintheSOCdesignflow．Meanwhile，aseriesofnewdesign，verification，manufacturemethodologiesandEDAtoolshavebeenemegingorbeingdeve

3、lopedtohandletheseissues．GPIBcontrolleriswidelyusedinautomatictestfield，forit’Sthecorcchipinmakingupthetestsystem．TheauthorcomesouttheideaofdesigntheIPcoreofGPIBcontrolchipusingFPGAtechnologybyreferringtoquantitiesoftechnicalbook,theanalyzeofintegratecircuit’Sdevelopmentintheworldandthefactofourst

4、affroom．ThedesignandrealizationoftheGPIBcontrollerbaseonFPGAwillbedescribedindetailsthistheme．Firstly，thisthesisintroducesthebackgroundandsignificanceabouttheGPIBcontrollerbasingonFPGA．Sencondly，thebasicknowledgeofdesignFPGAisdescribed．Inthecharacter，IonlydescribetheGPIBbustothepoint．Thereemphasis

5、ishowtouseFPGAtodesigntheIEEE一488．2protocolandintroducetheIPcoreofGPIBcontrollerteninterfacesfunction，especiallythedesigningofstatemachineaccordingtoIEEE·488．Inaddition，itdiscussesthedesigningofdatachannel．Basingonthebuildingblockdesignthought，wesplitthewholesystemintosomelittlemodules，usingtheVer

6、ilogHDLtoaccomplishthemandverifyitwithModelsimafteritissynthesizedbySynplify．Afterallthemoduleswerefinished，thesystemsoftIPcorecanbeinstalledbylinkingallthemodule’Ssymboltogether．Atlast，VerilogHDLcodewasimplementedonFPGAbyEDAt001．Inordertoverifytheidea，workingstatesimulationofGPIBcontrollerwithEDA

7、toolswascarriedout，andsatisfyingresultwasobtained．Finally，thispapersummarizedthedesignIPcoreofGPIBcontrollerbasedonFPGAandproposed西南交通大学硕士研究生学位论文第lII页thedevelopmenttendencyofcurrentGPIBcontrollerdesignandpointing