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1、GeneratingHardwareAssertionCheckersMarcBoulé·ZeljkoZilicGeneratingHardwareAssertionCheckersForHardwareVerification,Emulation,Post-FabricationDebuggingandOn-LineMonitoringABCDr.MarcBouléProf.ZeljkoZilicDepartmentofElectrical&ComputerEngineeringMcGillUniversity3480UniversityStreetMontrea
2、lQCH3A2A7Canadazeljko.zilic@mcgill.caISBN978-1-4020-8585-7e-ISBN978-1-4020-8586-4LibraryofCongressControlNumber:2008928686°c2008SpringerScience+BusinessMediaB.V.Nopartofthisworkmaybereproduced,storedinaretrievalsystem,ortransmittedinanyformorbyanymeans,electronic,mechanical,photocopyi
3、ng,microfilming,recordingorotherwise,withoutwrittenpermissionfromthePublisher,withtheexceptionofanymaterialsuppliedspecificallyforthepurposeofbeingenteredandexecutedonacomputersystem,forexclusiveusebythepurchaserofthework.Printedonacid-freepaper987654321springer.comAmesfr`ereset`amespar
4、entsbien-aim`es´MarcToKasia,Pauline,IvanAlexanderandMariaZeljkoForewordWhenIwasyoung,mydadlikedtotellme,Ifyoudontaskthequestion,youwontgettheanswer.Today,IhaveadeeperunderstandingofhismessageandIhaveappliedhiswisdomtomanyareasinmylife.Inmyprofessionallife,inthedomainofdigitaldesignand
5、verification,Ilearned(perhapsthehardway)thatifIneglecttowriteachecker,whichaskswhethersomeaspectofthedesignisbehav-ingcorrectlythenitisunlikelythatIwillfindcertainbugs.Thisconcept,knownasobservability,isattheheartofanassertion-basedverificationmethodology.Andifyouaskanyprojectmanager,Wha
6、tisthebiggestbottleneckinyourverificationflow?youarelikelytoheartheresponsedebug.Infact,thistypicalresponsehasbeenvalidatedbyvariousindustrialsurveys,whichhaveidentifiedthatdebuggingconsumesover60%ofaprojectsverificationeffort.Incontrast,therearevariouspublishedpapersfromindustrythathavem
7、easureduptoa50%reductionindebug-gingtimeduetoimprovedobservability,whichresultedfromapplyinganassertion-basedverification(ABV)methodology.Today,numerousorganizationshavecometothisrealization,andtheyarestartingtoreapthebenefitsofadoptinganABVmethodology.Notonlydoassertionsprovideameansto
8、descr