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1、WordLevelSymbolicModelCheckingANewapproachforVerifyingArithmeticCircuitsE.ClarkeX.ZhaoMay,1995CMU-CS-95-161SchoolofComputerScienceCarnegieMellonUniversityPittsburgh,PA15213ThisresearchwassponsoredinpartbytheNationalScienceFoundationunderGrantNo.CCR-9217549,bytheSemiconductorResearchCorp
2、orationunderContractNo.94-DJ-294,andbytheWrightLaboratory,AeronauticalSystemsCenter,AirForceMaterielCommand,USAF,andtheAdvancedResearchProjectsAgency(ARPA)underGrantNo.F33615-93-1-1330.TheUSGovernmentisauthorizedtoreproduceanddistributereprintsforGovernmentpurposes,notwithstandinganycop
3、yrightnotationthereon.Viewsandconclusionscontainedinthisdocumentarethoseoftheauthorsandshouldnotbeinterpretedasrepresentingtheocialpolicies,eitherexpressedorimplied,ofWrightLaboratoryortheUnitedStatesGovernment.Keywords:automaticverication,temporallogic,modelchecking,binarydecisiondi-
4、agrams,multi-terminalbinarydecisiondiagrams,binarymomentdiagrams,hybriddecisiondiagrams,wordlevelproperties,arithmeticcircuit,Pentium,divisioncircuitAbstractThehighly-publicizeddivisionerrorinthePentiumhasemphasizedtheimportanceofformalvericationofarithmeticoperations.Symbolicmodelchec
5、kingtechniquesbasedonbinarydecisiondiagrams(BDDs)havebeensuccessfulinverifyingcontrollogic.However,lackofproperrepresentationforfunctionsthatmapbooleanvectorsintointegershaspreventedthistechniquefrombeingusedforverifyingarithmeticcircuits.Wehaveusedhybriddecisiondiagramstorepresentthein
6、tegerfunctionsthatoccurinthearithmeticcircuitverication.Forthestatevariablescorrespondingtodatabits,ourrepresentationbehaveslikeabinarymomentdiagram(BMD)whileforthestatevariablescorrespondingtocontrolsignals,itbehaveslikeamulti-terminalBDD(MTBDD).Byusingthisrepresentation,weareabletoha
7、ndlecircuitswithbothcontrollogicandwidedatapaths.WehaveextendedthesymbolicmodelcheckingsystemSMVsothatitcanalsohandlepropertiesinvolvingrelationshipsamongdatawords.IntheoriginalSMVsystem,atomicformulascouldonlycontainstatevariables.Intheextendedsystem,weallowatomicfor-mulastobe