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ID:34084429
大小:2.53 MB
页数:36页
时间:2019-03-03
《wiley.ieee.press.rtl.hardware.design.using.vhdl.apr.2006.0004》由会员上传分享,免费在线阅读,更多相关内容在教育资源-天天文库。
1、A-PDFSplitDEMO:Purchasefromwww.A-PDF.comtoremovethewatermark634CLOCKANDSYNCHRONIZATIONPRINCIPLEANDPRACTICE40ifack-sync=’lthenstate-next<=s-req0;endif;whens-req0=>ifack-sync=’O’then45state-next<=idle;endif;endcase;endprocess;-look-aheadoutputlogic50process(state-next)begincasestate
2、-nextiswhenidle=>req-buf-next<=’0’;55whens-reql=>req-buf-next<=’1’;whens-req0=>req-buf-next<=’0’;endcase;60endprocess;req-out<=req-buf-reg;endarch;Listing16.8ListenerFSMofthefour-phasehandshakingprotocollibraryieee;useieee.std-logic-1164.all;entitylistener-fgmisport(5clk,reset:ins
3、td-logic;req-sync:instd-logic;ack-out:outstd-logic1;endlistener-fsm;10architecturearchoflistener-fsmistype1-state-typeis(s-ackO,s-ackl);signalstate-reg,state-next:1-state-type;signalack-buf,reg,ack-buf-next:std-logic;ISbegin-stateregisterandoutputbuffer..process(clk,reset1beginif(
4、reset=’l’)thenmstate-reg<=s-ack0;ack-buf-reg<=’0;elsif(clk’eventandclk=’l’)henstate-reg<=state-next;ack-buf-reg<=ack-buf-nextl5endif;endprocess;-next-statelogicHANDSHAKINGPROTOCOL635process(state-reg,req-sync)begin30state-next<=state-reg;casestate-regiswhens-ack0=>ifreq-sync=1then
5、state-next<=s-ackl;35endif;whens-ackl=>ifreq-sync='0thenstate-next<=s-ack0;endif;endcase;endprocess;--look-aheadoutputlogicprocess(state-next)begincasestate-nextiswhens-ack0=>ack-buf-next<='OJ;whens-ackl=>ack-buf-next<='1';endcase;endprocess;ack-out<=ack-buf-rag;endarch;Tocomplete
6、thedesign,synchronizersareneededfortheinputsignals.Again,toem-phasizetheuniquecharacteristicsofthesynchronizationcircuits,weseparatethemfromtheregularsequentialcircuitsandinstantiatethesynchronizersinthetoplevel.TheVHDLcodesofthecompletedesignfollowtheblockdiagraminFigure16.15anda
7、reshowninListings16.9and16.10respectively.Listing16.9Talkerofthefour-phasehandshakingprotocollibraryieee;useieee.std-logic-1164.all;entitytalker-strisport(5clkt:instd-logic;resett:instd-logic;ack-in:instd-logic;start:instd-logic;ready:outstd-logic;10req-out:outstd-logic1;endtalker
8、-str;architecturestr-archoftalker
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