简易电子时钟设计实验报告

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1、实验二简易电子时钟设计学院：研究生院学号：1400030034姓名：张秋明一、实验目的及要求设计一个简易电子时钟，实现分、秒计时功能，使之在控制实验板上液晶输出分、秒数值，在环境下，编写源文件，用软件器件实现。二、实现程序moduleclk_gen(clk,rst_n,clk_pwm,clk_frame);inputelk;inputrst_n;outputclk_pwm;outputclk_frame;regclk_pwm;regclk_frame;reg[11:0]count_pwm;reg[13:0]count_frame;always@(posedgeel

2、kornegedgerst_n)〃一秒的设置beginif(rst_n==rb0)begincount_pwm<=11*b00000000000;//12clk_pwm<=rbO;endelsebeginif(count_pwm==12'bOOOOOOOOO1010)begincount_pwm<=12*6000000000000;//clk_pwm<=〜clk_pwm;endelsecount_pwm<=count_pwm+Pbl;endendalways@(posedgeelkornegedgerst_n)beginif(rst_n二=TbO)begincou

3、nt.frame<=14'b00000000000000;clk_frame<=1'bO;endelsebeginif(count_frame==14'b11000000000000)begincount_frame<=14,b00000000000000;clk_frame<=〜clk_frame;endelsecount_frame<=count_frame+rbl;endendendmodule〃时钟的进位机理moduleclock(clkk,rstn,minute_h,minute_l,second_h,second」);inputclkk;inputrs

4、tn;output[3:0]minute_h;〃分蚀的高位output[3:0]minute_l;〃分钟的低位output[3:0]second_h;〃秒钟的高位output[3:0]second」；〃秒钟的低位reg[3:0]minute_h;reg[3:0]minute_l;reg[3:0]second_h;reg[3:0]second_l;regsecond_l_flag;〃秒钟低位的进位标志regsecond_h_flag;//秒钟高位的进位标志regminute_l_flag;〃分钟低位的进位标志regclkl;reg[22:0]count;always

5、@(posedgeclkk)beginif(count==23*610110111000110110000000)begincount<=0;clkl<=〜clkl;endelsecount<=count+「bl;endalways@(posedgeelkornegedgerstn)beginif(!rstn)clkl<=1'bO;elseclkl<=〜clkl;endalways@(posedgeclklornegedgerstn)if(!rstn)beginsecond」v=4'b0000;second_l_flag<=PbO;endelsebeginif(s

6、econd_l==4rbl001)beginsecond_l<=4'b0000;//second_l+l'bl;second_l_flag<=Pbl;endendalways@(posedgesecond」_flagornegedgerstn)if(!rstn)beginsecond.h<=4'b0000;second_h_flag<=PbO;endelsebeginif(second_h==4*b0101)beginsecond_h<=4'b0000;//second_h+1'bl;second_h_flag<=fbl;endendalways@(posedge

7、second_h_flagornegedgerstn)//分钟的低位if(!rstn)beginminutej<=4'b0000;minute」_flag<=fbO;endelsebeginif(minute_l==4'b1001)beginminutej<=4'b0000;//minute_l+l'bl;minute_l_flag<=Pbl;endend〃分钟的高位always@(posedgeminute_l_flagornegedgerstn)〃进位标志位为上升沿吋变化if(!rstn)beginminute_h<=4*50000;endelsebegini

8、f(min