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1、-------ABSTRACTABSTRACTWiththedevelopmentofSwitchingModePowerSupply,thepowermanagementICsforstepdownapplyisingreatdemand.Inordertomeetthemarketrequirement,aPWMcontrolledstep-downDC-DCconverterisdesignedinthisthesis.ItisbasedonUMC0.6μmBCDprocess.Withwideinputvo
2、ltagerangefrom8Vto40V,anoutputvoltagedownto5Vcanbegenerated.Aninternallinearregulatorprovidesthesupplyvoltageforthewholechip.Thelow-cost,N-channelDMOStopologywith100mΩonresistanceenablesoperationefficiencyashighas92%.Itusesvoltage-modecontrolarchitecture,provi
3、dingfastloadtransientresponsewithoutstandingcompensationcalledactiveinductor,activecapacitor.ThisnovelcompensationloopwhichgivingthePWMfunctionenoughphasemargincanberealizedusingeasybipoloropampwithMillercompensation.Furthermore,highswitchingfrequency(280kHzor
4、400kHzselectable)allowseasierfilteringandfasterloopperformance.Thisconvertercanoperateinthetemperaturerangefrom-25℃to125℃.Itiswellsuitedforbatterychargers,communicationandradioequipmentregulatorwithsynchronizedclockfrequency.Inthisthesis,thebasicprinciplesofbu
5、ckpowerstagewereproposed.Then,the
wholechipdiagramwasgivenaccordingtothedesignspecification.Thewholechip
performancewasintroduced.Basedonthewholechipelectricalcharacteristics
requirements,sub-blockdesignandsimulationwerecompleted.Sincethechiphasa
novelcompensa
6、tionnetwork,particularattentionhasbeenpaidtotheanalysisofthe
wholechipperformanceandthedesignofthefollowingsub-blocksincludingactive
inductor,activecapacitor,gaincompensation,controllogicanddriver.Atlast,the
wholechiptypicalperformancecharacteristicswerepresen
7、ted.Intheconclusionofthis
thesis,therealizationofthiscircuitwaspointedout.Cornersimulationsofsub-blocks
andthewholechiphavebeenmadeatthesametime.Thisthesisisaproductionofcircuitdesignandsimulationpractice.Basedonthe
circuitanalysisanddesign,theauthorsimulatedt
8、hesub-blockcircuitsandthewhole
chipcircuitbyapplyingtheEDAtoolHSPICE.ThesimulationresultsindicatedthattheII-----------ABSTRACTIChaswellachievedthespectation;bothwholechipperformanc
