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1、------hdb3_coder.vhd,实现HDB3编码器功能libraryieee;useieee.std_logic_1164.all;entityhdb3_coderisport(codein:instd_logic;clk:instd_logic;clr:instd_logic;codeout:outstd_logic_vector(1downto0));endhdb3_coder;architecturertlofhdb3_coderissignalcodeoutv:std_logic_vector(1do
2、wnto0);signalcount0:integer:=0;signals0:std_logic_vector(4downto0):="00000";signalcount1:integerrange1downto0;signalcodeoutb:std_logic_vector(1downto0);signals1:std_logic_vector(4downto0):="00000";signalclkb:std_logic;signals3:std_logic_vector(1downto0);signalfl
3、ag1b:integerrange1downto0;signalflagv:integerrange1downto0;signalfirstv:integerrange0to1;componentdff--调元件dffport(d:instd_logic;clk:instd_logic;q:outstd_logic);endcomponent;beginadd_v:process(clk,clr)--插Vbeginif(rising_edge(clk))thenif(clr='1')thencodeoutv<="00"
4、;count0<=0;elsecasecodeiniswhen'1'=>codeoutv<="01";--01代表1count0<=0;when'0'=>if(count0=3)then--四连0插vcodeoutv<="11";count0<=0;elsecount0<=count0+1;codeoutv<="00";endif;whenothers=>codeoutv<="00";count0<=count0;endcase;endif;endif;endprocessadd_v;s0(0)<=codeoutv(0
5、);s1(0)<=codeoutv(1);dsll:dffportmap(s1(0),clk,s1(1));ds01:dffportmap(s0(0),clk,s0(1));dsl2:dffportmap(s1(1),clk,s1(2));ds02:dffportmap(s0(1),clk,s0(2));dsl3:dffportmap(s1(2),clk,s1(3));ds03:dffportmap(s0(2),clk,s0(3));--dsl4:dffportmap(s1(3),clk,s1(4));--ds04:d
6、ffportmap(s0(3),clk,s0(4));--dsl5:dffportmap(s1(4),clk,s1(5));--ds05:dffportmap(s0(4),clk,s0(5));bclk:clkb<=notclk;add_b:process(clkb)--插Bbeginif(rising_edge(clkb))thenif(codeoutv="11")thenif(firstv=0)thencount1<=0;firstv<=1;s1(4)<=s1(3);s0(4)<=s0(3);elseif(coun
7、t1=0)thens1(4)<='1';s0(4)<='0';count1<=0;elses1(4)<=s1(3);s0(4)<=s0(3);count1<=0;endif;endif;elsif(codeoutv="01")thencount1<=count1+1;s1(4)<=s1(3);s0(4)<=s0(3);elses1(4)<=s1(3);s0(4)<=s0(3);count1<=count1;endif;endif;endprocessadd_b;codeoutb<=s1(4)&s0(4);output:
8、process(clkb)--输出beginif(rising_edge(clkb))thenif((codeoutb="01")or(codeoutb="10"))then--1或Bif(flag1b=1)thencodeout<="01";flag1b<=0;elsecodeout<="11";flag1b<=1;endif;