风扇定时fpga设计

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1、风扇主程序modulefengshan(clk,rst,key1,key2,num,out_en,hex1,hex2);inputclk,rst;inputkey1,key2;output[6:0]num;output[6:0]hex1,hex2;outputout_en;reg[6:0]num;regout_en;wireclk_1hz;fenpina(.clk_50mhz(clk),.clk_1hz(clk_1hz));shumab(.num(num),.hex1(hex1),.hex2(hex2)

2、);always@(posedgeclk_1hzornegedgerst)beginif(!rst)beginnum<=6'd59;out_en<=1'b0;endelseif(key1)beginnum<=6'd59;out_en<=1'b1;endelseif(key2)beginnum<=6'd59;out_en<=1'b0;endelsebeginif(num<=6'd0)beginnum<=6'd59;out_en<=~out_en;endelsenum<=num-1'b1;endendend

3、module数码管moduleshuma(num,hex1,hex2);input[6:0]num;outputreg[6:0]hex1,hex2;reg[6:0]num_g,num_s;always@(num)beginnum_g=num%10;num_s=num/10;case(num_g)4'd0:hex1=7'hc0;4'd1:hex1=7'hf9;4'd2:hex1=7'ha4;4'd3:hex1=7'hb0;4'd4:hex1=7'h99;4'd5:hex1=7'h92;4'd6:hex1=

4、7'h82;4'd7:hex1=7'hf8;4'd8:hex1=7'h80;4'd9:hex1=7'h90;default:hex1=7'hc0;endcasecase(num_s)4'd0:hex2=7'hc0;4'd1:hex2=7'hf9;4'd2:hex2=7'ha4;4'd3:hex2=7'hb0;4'd4:hex2=7'h99;4'd5:hex2=7'h92;4'd6:hex2=7'h82;4'd7:hex2=7'hf8;4'd8:hex2=7'h80;4'd9:hex2=7'h90;def

5、ault:hex2=7'hc0;endcaseendendmodule分频modulefenpin(clk_50mhz,clk_1hz);inputclk_50mhz;outputregclk_1hz;reg[31:0]count;always@(posedgeclk_50mhz)beginif(count==32'd2500000)beginclk_1hz<=~clk_1hz;count<=32'd0;endelsecount<=count+1;endendmodule开关模块modulekey(cl

6、k_1hz,rst,key,out_aa);inputclk_1hz,rst;inputkey;outputout_aa;regout_aa;always@(posedgeclk_1hzornegedgerst)beginif(!rst)out_aa<=1'b0;elsebeginif(key)out_aa<=1'b1;elseout_aa<=1'b0;endendendmodule