vhdl电子琴的设计程序

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1、附录程序清单：顶层模块程序：libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entitytopisPort(clk32MHz:instd_logic;--32MHz系统时钟handTOauto:instd_logic;--键盘输入/自动演奏code1:outstd_logic_vector(6downto0);--音符显示信号index1:instd_logic_v

2、ector(7downto0);--键盘输入信号high1:outstd_logic;--高低音节信号spkout:outstd_logic);--音频信号endtop;architectureBehavioraloftopiscomponentautomusicPort(clk:instd_logic;Auto:instd_logic;index2:instd_logic_vector(7downto0);index0:outstd_logic_vector(7downto0));endcomponent;c

3、omponenttonePort(index:instd_logic_vector(7downto0);code:outstd_logic_vector(6downto0);high:outstd_logic;tone0:outintegerrange0to2047);endcomponent;componentspeakerPort(clk1:instd_logic;tone1:inintegerrange0to2047;spks:outstd_logic);endcomponent;signaltone2:

4、integerrange0to2047;signalindx:std_logic_vector(7downto0);beginu0:automusicportmap(clk=>clk32MHZ,index2=>index1,index0=>indx,Auto=>handtoAuto);u1:toneportmap(index=>indx,tone0=>tone2,code=>code1,high=>high1);u2:speakerportmap(clk1=>clk32MHZ,tone1=>tone2,spks

5、=>spkout);endBehavioral;自动演奏模块程序libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entityautomusicisPort(clk,Auto:instd_logic;--系统时钟；键盘输入/自动演奏index2:instd_logic_vector(7downto0);--键盘输入信号index0:outstd_logic_vecto

6、r(7downto0));--音符信号输出endautomusic;architectureBehavioralofautomusicissignalcount0:integerrange0to31;--changesignalclk2:std_logic;beginpulse0:process(clk,Auto)--此进程完成对系统时钟8M的分频，得到4Hz的信号clk2variablecount:integerrange0to8000000;beginifAuto='1'thencount:=0;clk2<

7、='0';elsifclk'eventandclk='1'thencount:=count+1;ifcount=4000000thenclk2<='1';elsifcount=8000000thenclk2<='0';count:=0;endif;endif;endprocess;music:process(clk2)--此进程完成自动演奏部分曲的地址累加beginifclk2'eventandclk2='1'thenifcount0=31thencount0<=0;elsecount0<=count0+1;e

8、ndif;endif;endprocess;com1:process(count0,Auto,index2)beginifAuto='0'thencasecount0is--此case语句：存储自动演奏部分的曲when0=>index0<="00000100";--3when1=>index0<="00000100";--3when2=>index0<="00000100";--3wh