盛群单片机HT32入门

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1、2014年福建省大学生合泰杯单片机应用设计竞赛竞赛培训会HoltekHT32F1765(March2014)AgendaTimeNameContent60min原理与架构ARMCortex-M3HoltekHT32F1765Peripherals10minBreak90min工具介绍及实验DevelopmentToolsDevelopmentBoard,e-Link32,IDEImplementationI:BuildingenvironmentSoftwareDevelopmentCMSIS,HT32FirmwareLib

2、rary,RTOSImplementationII:FirstprojectResourceDevelopmentKit,Tools&Software,Document,ApplicationNoteFlashProgrammingWriter/ICP/ISP/IAP,HT32FlashProgrammer20minQ&A2ARMCortex-M3Cortex-MSeriesSource:ARM4Overview–ARMCortex-M3Cortex-M3CoreThumb&Thumb2decoders32-bitALUHar

3、dwaredivider&MultiplierETM,NVIC,andBusInterfaceCortex-M3ProcessorNestedVectoredInterruptController(NVIC)OptionalMemoryProtectionUnit(MPU)(NotavailableinHT32F125x)BusmatrixCode/SRAM/PeripheralinterfacesDebugcomponentsOptionalEmbeddedTraceMacrocell(ETM)(Notavailablein

4、HT32Series)Source:ARM5Architecture*HT32F2755only3IndependentBus–ICode,DCode,System61.25DMIPS0.900.930.75Thumb-231%denser*Upto38%moreperformance*CodeDensityPerformanceARMThumb*RVDS2.2Performance50MHzCM3=1.25x50=62.5DMIPS50MHzCM0=0.90x50=45.0DMIPSPerformance=(62.5-45)

5、/45=38.9%Source:ARM7AdvantagesRISCProcessorCoreARM-V732-bitCPUwith1.25DMIPS/MHzThumb-2TechnologyOptimalblendof16/32-bitinstructionsLowPowerModesMultiplepowerdomainsNestedVectoredInterruptController(NVIC)Lowlatency,low jitterinterruptresponseInterruptserviceroutinesi

6、npureCEnhancedInstructionsH/WDivider(2-12Cycles)&1-CycleMultiplierToolsandRTOSBroad3rdpartytoolssupportCMSISMaximizessoftwareeffortreuseDebug&TraceJTAGorSWD(2-pinSerialWireDebug)Multipleprocessors&real-timetraceSource:ARM8ARMCortex-M3Programmer’sModelMemoryModelExce

7、ptionModelFaultHandlingPowerManagementCortex-M3Peripherals9Programmer’sModel–RegisterRegisterDescriptionsR0~R7AccessiblebyallinstructionsR8~R12Accessiblebyfew16-bitandall32-bitinstructionsSP(R13)BankedStackPointerProcessandMain(PSPandMSP)LR(R14)LinkRegisterPC(R15)Pr

8、ogramCounterxPSRProgramStatusRegisterApplication(APSR)Interrupt(IPSR)Execution(EPSR)PRIMASKMaskallinterruptsandexceptionsexceptNMIandhardf