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1、汽车尾灯设计VHDL语言--EDA课程设计元件列化部分Libraryieee;Useieee.std_logic_1164.all;Useieee.std_logic_unsigned.all;Entitytpis Port(clk:instd_logic; Left:instd_logic; Right:instd_logic; Brake:instd_logic; Night:instd_logic; Ld1,ld2,ld3:outstd_logic;
2、 Rd1,rd2,rd3:outstd_logic);End;ArchitecturebhoftpisSignaltmp0,tmp1,tmp2,tmp3,tmp4:std_logic;Signalerr0,err1,err2,err3,err4,err5:std_logic;signalbm:std_logic;Begin Componentszis Port(clk:instd_logic; Cp:outstd_logic); Endcomponent; Component
3、ctrlis Port(left,right,brake,night:instd_logic; Lp,rp,lr,brake_led,night_led:outstd_logic); Endcomponent; Componentlcis Port(clk,lp,lr,brake,night:instd_logic; Ledl,ledb,ledn:outstd_logic); Endcomponent; Componentrcis Port(clk,rp,
4、lr,brake,night:instd_logic; Ledr,ledb,ledn:outstd_logic); Endcomponent;U1:szportmap(clk,bm);U2:ctrlportmap(left,right,brake,night,tmp0,tmp1,tmp2,tmp3,tmp4);U3:lcportmap(clk,tmp0,tmp2,tmp3,tmp4,err0,err1,err2);U4:rcportmap(clk,tmp1,tmp2,tmp3,tmp4,err3
5、,err4,err5);Ld1<=err0andbm;Ld2<=err1;Ld3<=err2;Rd1<=err3andbm;Rd2<=err4;Rd3<=err5;End;汽车尾灯主控制模块CTRL：LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYCTRLIS PORT(LEFT,RIGHT,BRAKE,NIGHT:INSTD_LOGIC; LP,RP,LR,BRAKE_LED,NIGHT_LED:OUTSTD_LOGIC);ENDENTITYCTR
6、L;ARCHITECTUREARTOFCTRLIS BEGIN NIGHT_LED<=NIGHT; BRAKE_LED<=BRAKE; PROCESS(LEFT,RIGHT) VARIABLETEMP:STD_LOGIC_VECTOR(1DOWNTO0); BEGIN TEMP:=LEFT&RIGHT; CASETEMPIS WHEN"00"=>LP<='0';RP<='0';LR<='0'; WHEN"01"=>
7、LP<='0';RP<='1';LR<='0'; WHEN"10"=>LP<='1';RP<='0';LR<='0'; WHENOTHERS=>LP<='0';RP<='0';LR<='1'; --输出错误控制信号 ENDCASE; ENDPROCESS;ENDARCHITECTUREART; 时钟分频模块SZ：LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.
8、ALL;ENTITYSZIS PORT(CLK:INSTD_LOGIC; --时钟输入 CP:OUTSTD_LOGIC);ENDENTITYSZ;ARCHITECTUREARTOFSZIS SIGNALCOUNT:STD_LOGIC_VECTOR(7DOWNTO0); --定义八位标准逻辑位矢量数据类型 BEGIN PROCESS(CLK) BEGI
